Speeding up the device deployment time cycle is a major challenge for designers and developers of integrated circuits. DDGen, an innovative tool from Vayavya Labs, may help them overcome this hurdle.

Speeding up the device deployment (hardware plus software activity) cycle is often an uphill task in an integrated circuit development process. This is difficult to achieve, as the hardware and software teams operate in isolation. To improve the synergy between the two teams, Vayavya Labs has designed DDGen, a tool that replaces the current ad hoc communication between the hardware and software developers with a standardised framework, thereby helping in bridging the gap between the two.

Companies spend a lot of effort and time in porting drivers and adapting to different operating systems.{quotes}"Using DDGen, one can quickly generate a new set of required drivers. Our beta evaluations have shown that customers can save up to 90 per cent of the effort in driver re-writing/porting," states R.K. Patil, the CEO of Vayavya Labs.{/quotes}

Speeding up driver software development

An automated device driver generator, DDGen is a productivity enhancement tool for embedded systems designers and developers, and is a first in the line of products that the firm plans to develop and release. The tool enables the driver software to be developed even before the hardware system is ready for testing and deployment. This leads to shrinkage in the development and marketing/support time lines for the companies. In the coming days, semiconductor companies will use such tools to differentiate and showcase competitive advantage. This virtualisation of driver development has never been one before.

There have been previous attempts, mostly in research, to automate driver generation. But most of the activities hit roadblocks and were not able to address the problem in totality. DDGen provides a framework for automated device driver generation. At the core of the system are a smart compiler and two input specifications. The two specifications pertain to the device programming specification (DPS) and run time specifications (RTS). The tool outputs ANSI (American National Standard Institute) C standard code that can be plugged into application development.

Vayavya Labs has also developed a solution to automate the process of code layout in hierarchal memory-based embedded systems. This is also expected to save costs and effort for firms.

The inaugural move

Vayavya Labs commenced operations in July 2006, and operates from Belgaum. It also has a customer support centre in Bangalore. Presently, the company has representatives in Japan, Taiwan and the US, although most of its workforce is based in Belgaum. Like any other company, this firm juggled with a lot of different names, but the 'Eureka' moment came when a team member spotted the name 'Vayavya' on a state road transport corporation bus. Vayavya means 'northwest' in Sanskrit. As it coincided with their location of work, it was decided to call the company Vayavya Labs.

The founding team's first-hand experience in different semiconductor and software firms was the trigger point for the development of DDGen. The founders had been quite astonished to discover that the IC team and the software teams operated in isolation. This led to the development of a tool that could assist both groups and make them realise that their ultimate goal was the same, enabling them to work in association.

"We have often seen how critical the device drivers become in delivering a product on time or in winning new customers. Often, due to the non-availability of expert device drivers, developers have stalled projects. I remember that some time ago, the support for the right device driver for a graphical chip became a hurdle in the way of bringing out a new release of a desktop operating system. The matter became so serious that the head of the company had to consider creating a device driver. Imagine the worth of DDGen, which could automate and help avoid such situations," exclaims Patil.